soft-core
英 [ˈsɒft kɔː(r)]
美 [ˈsɔːft kɔːr]
adj. 软性色情的; (性描写等)隐晦的,含蓄的
牛津词典
adj.
- 软性色情的;(性描写等)隐晦的,含蓄的
showing or describing sexual activity without being too detailed or shocking
柯林斯词典
- (性描写)非赤裸裸的,较隐晦的
Soft-corepornography shows or describes sex, but not very violent or unpleasant sex, or not in a very detailed way.
双语例句
- Design and Implementation of Multi-channel Phone-billing-system Based upon NIOS Soft-core CPU
基于NIOS软核CPU技术的多路电话计费系统的设计与实现 - Implementing the synchronization of industrial Ethernet precise clock based on Nios II soft-core
基于NiosⅡ软核的工业以太网精确时钟同步的实现 - With the establishing of verification and test platform for SDH chip, We realize the function simulation, timing simulation and performance test of the IP soft-core.
通过建立SDH芯片验证平台和SDH芯片测试平台,实现IP软核的功能仿真、时序仿真和芯片性能测试。 - Nios II soft-core processor implanted into FPGA as the control chip controls and preprocesses the data of the entire image acquisition system.
采用FPGA作为控制芯片,在其中植入NiosⅡ软核处理器以对整个图像采集系统的数据进行控制和预处理。 - NIOS ⅱ soft-core processor is a flexible and efficient embedded processor promoted by Altera Corporation.
NIOSⅡ软核处理器是Altera公司推出的一款灵活高效的嵌入式处理器。 - Then, through the embedded soft-core processor technology based on FPGA, entire system the control, and processing and transmission of data of were achieved by using the co-design approach of hardware and software.
然后,通过基于FPGA的嵌入式软核处理器技术,采用软硬件协同设计的方法,实现对整个系统功能的控制及数据的处理与发送。 - To solute the problem, the idea of kernel hardware design has been put forward. System architecture is divided into soft-core and hardcore. Hardcore will manage application tasks as a coprocessor to improve the real time of system.
针对实时性问题,提出将内核硬件化设计的思想,将系统的体系结构划分为软核和硬核,硬核作为协处理器管理应用任务,提高系统的实时性,使系统的性能得到明显的提高。 - SOPC includes soft-core or hard-core CPU 、 memory 、 I/ O and programmable logic resource, which has all the advantage of SOC 、 PLD and FPGA.
SOPC综合了SOC、PLD和FPGA的优点,集成了硬核或软核CPU、存储器、I/O以及可编程逻辑。 - This paper introduces 8B/ 10B encoding technique, and puts forward a simple and practical realization method of an 8B/ 10B encoder. Furthermore, a versatile soft-core designed with Verilog is presented.
本文介绍了8B/10B编码技术,提出了一种简单、实用的8B/10B编码器的实现方法,并且采用Verilog语言设计了一种通用的软核。 - Design of an Ethernet Interface Based on the Nios Soft-core Processor
基于Nios软核处理器的以太网接口设计