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soft-core

英 [ˈsɒft kɔː(r)]

美 [ˈsɔːft kɔːr]

adj.  软性色情的; (性描写等)隐晦的,含蓄的

牛津词典

    adj.

    • 软性色情的;(性描写等)隐晦的,含蓄的
      showing or describing sexual activity without being too detailed or shocking

      柯林斯词典

      • (性描写)非赤裸裸的,较隐晦的
        Soft-corepornography shows or describes sex, but not very violent or unpleasant sex, or not in a very detailed way.

        双语例句

        • A 40Gb/ s switch IP soft-core with self-dependence intellectual property was realized.
          形成了具有自主知识产权的40Gb/s交换IP软核。
        • The Nios ⅱ soft-core processor improve the integration of the system and is helpful to the miniaturization of instrument.
          NiosⅡ软核处理器提高了系统的集成度,有利于系统的小型化,降低了成本。
        • I distinctly remember my high school self, wide-eyed, poring over the soft-core Starr report with friends.
          我还清楚地记得高中时代的我,睁大了眼睛,和朋友们一起狼吞虎咽地读着《斯塔尔报告》(StarrReport)中那些香艳的内容。
        • According to the structure model of data acquisition and processing system connected by Ethernet, the network interface module based on the Nios soft-core system is designed to construct the network data acquisition system.
          为构建网络化的数据采集系统,根据数据采集模块与处理控制模块通过以太网相连接的结构模型,设计了基于Nios软核系统的嵌入式以太网网络接口模块。
        • Nios II soft-core processor implanted into FPGA as the control chip controls and preprocesses the data of the entire image acquisition system.
          采用FPGA作为控制芯片,在其中植入NiosⅡ软核处理器以对整个图像采集系统的数据进行控制和预处理。
        • First some algorithms of gray-scale quantifying are analysised and simulated, and then the detailed designs of complex mold sub-module, quantifying sub-module and SDRAM soft-core controller is presented. 4.
          先对灰度量化算法进行了分析和仿真比较,然后详细介绍了复数求模子模块、量化子模块、SDRAM控制器的设计。
        • It inherits the hardcore, soft-core, DSP, memory, peripheral I/ O and programmable logic.
          它继承了硬核、软核、DSP、存储器外围I∕O及可编程逻辑。
        • This paper introduces 8B/ 10B encoding technique, and puts forward a simple and practical realization method of an 8B/ 10B encoder. Furthermore, a versatile soft-core designed with Verilog is presented.
          本文介绍了8B/10B编码技术,提出了一种简单、实用的8B/10B编码器的实现方法,并且采用Verilog语言设计了一种通用的软核。
        • The hierarchical, modular design idea was used in the system which embeds the Nios II soft-core processor system in FPGA. And the on-chip hardware and software designs are completed.
          整个系统采用层次化、模块化的设计思想,将NIOSii软核处理器系统嵌入到FPGA中,完成片上硬件和软件的设计。
        • Research and Design of Nios ⅱ Soft-core Processor
          NiosⅡ软核处理器的研究与设计